Logic synthesis and verification algorithms / by Gary D. Hachtel, Fabio Somenzi.

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Bibliographic Details
Edition:	1st softcover ed.
Published:	New York, N.Y. : Springer c2006.
Main Author:	Hachtel, Gary D.
Other Authors:	Somenzi, Fabio
Subjects:	Integrated circuits > Very large scale integration > Design > Data processing. Logic design > Data processing. Integrated circuits > Verification. Computer-aided design.
Format:	Book

EPS Library, Level 3

Holdings details from EPS Library, Level 3
Call Number Copy Loan Type Status Request
TK 7874.75 .H117 2006 AU13527827B For loan Available now Request this copy