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904380 |
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20041223102100.0 |
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041013s2005 njua b 001 0 eng d |
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|a 0131491792
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|a 8923521
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|a (OCoLC)ocm56722938
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|a (BNAtoc)V4K39608
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|a (OCoLC)56722938
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|a OCoLC
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|a UW1A
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|a QA76.9.A73
|b C595 2005
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|3 Bib#:
|a 904380
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| 100 |
1 |
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|a Comer, Douglas.
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| 245 |
1 |
0 |
|a Essentials of computer architecture /
|c Douglas E. Comer.
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| 260 |
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|a Upper Saddle River, N.J. :
|b Pearson/Prentice Hall,
|c c2005.
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| 300 |
|
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|a xxiii, 369 p. :
|b ill. ;
|c 25 cm.
|
| 504 |
|
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|a Includes bibliographical references and index.
|
| 505 |
0 |
0 |
|g Ch. 1.
|t Introduction and overview --
|g Ch. 2.
|t Fundamentals of digital logic --
|g Ch. 3.
|t Data and program representation --
|g Ch. 4.
|t The variety of processors and computational engines --
|g Ch. 5.
|t Processor types and instruction sets --
|g Ch. 6.
|t Operand addressing and instruction representation --
|g Ch. 7.
|t CPUs : microcode, protection, and processor modes --
|g Ch. 8.
|t Assembly languages and programming paradigm --
|g Ch. 9.
|t Memory and storage --
|g Ch. 10.
|t Physical memory and physical addressing --
|g Ch. 11.
|t Virtual memory technologies and virtual addressing --
|g Ch. 12.
|t Caches and caching --
|g Ch. 13.
|t Input/output concepts and terminology --
|g Ch. 14.
|t Buses and bus architectures --
|g Ch. 15.
|t Programmed and interrupt-driven I/O --
|g Ch. 16.
|t A programmer's view of devices, I/O, and buffering --
|g Ch. 17.
|t Parallelism --
|g Ch. 18.
|t Pipelining --
|g Ch. 19.
|t Assessing performance --
|g Ch. 20.
|t Architecture examples and hierarchy --
|g App.
|t Lab exercises for a computer architecture course.
|
| 650 |
|
0 |
|a Computer architecture.
|
| 991 |
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|a 2004-12-21
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| 992 |
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|a Created by julew, 21/12/2004. Updated by julew, 23/12/2004.
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| 999 |
f |
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|i 6f611ac7-a19d-5c1b-beaa-65727329257b
|s 4a2034dc-e466-58f8-a555-8f62de8c1e61
|t 0
|
| 952 |
f |
f |
|p For loan
|a University Of Canterbury
|b UC Libraries
|c EPS Library
|d EPS Library, Level 2
|t 0
|e QA 76.9 .A73 .C732 2005
|h Library of Congress classification
|i Book
|m AU12202193B
|
