|
|
|
|
| LEADER |
00000cam a2200000 a 4500 |
| 001 |
238143 |
| 005 |
20081125084200.0 |
| 008 |
890413s1987 maua b 001 0 eng |
| 010 |
|
|
|a 87017302
|
| 020 |
|
|
|a 0898382440
|
| 035 |
|
|
|a 238143
|
| 035 |
|
|
|a (upgd41) 87017302
|
| 035 |
|
|
|a (nzNZBN)3926004
|
| 035 |
|
|
|a (OCoLC)16224692
|
| 040 |
|
|
|d FMlbTMQ
|
| 050 |
0 |
0 |
|a TK7874
|b .W34 1987
|
| 082 |
0 |
0 |
|a 621.38173
|
| 090 |
|
|
|a TK 7874 .W178
|
| 097 |
|
|
|3 Bib#:
|a 238143
|
| 100 |
1 |
|
|a Walker, Duncan Moore Henry.
|
| 245 |
1 |
0 |
|a Yield simulation for integrated circuits /
|c by Duncan Moore Henry Walker.
|
| 260 |
|
|
|a Boston :
|b Kluwer Academic Publishers,
|c c1987.
|
| 300 |
|
|
|a x, 209 p. :
|b ill ;
|c 25 cm.
|
| 440 |
|
0 |
|a Kluwer international series in engineering and computer science.
|p VLSI, computer architecture, and digital signal processing.
|
| 500 |
|
|
|a Based on author's thesis (Ph. D.)
|
| 500 |
|
|
|a Includes index.
|
| 504 |
|
|
|a Bibliography: p. [189]-206.
|
| 650 |
|
0 |
|a Integrated circuits
|x Very large scale integration
|x Design and construction
|x Mathematical models.
|
| 650 |
|
0 |
|a Integrated circuits
|x Very large scale integration
|x Design and construction
|x Data processing.
|
| 650 |
|
0 |
|a Integrated circuits
|x Very large scale integration
|x Defects
|x Mathematical models.
|
| 650 |
|
0 |
|a Integrated circuits
|x Very large scale integration
|x Defects
|x Data processing.
|
| 650 |
|
0 |
|a Monte Carlo method.
|
| 991 |
|
|
|a 1995-08-30
|
| 992 |
|
|
|a Created by , 30/08/1995. Updated by osmo, 25/11/2008.
|
| 999 |
f |
f |
|i 2c07d79a-adcb-53b8-b66e-46a0c4549da8
|s 263b77e7-57d3-54d8-b9f5-be4130210a40
|t 0
|
| 952 |
f |
f |
|p For loan
|a University Of Canterbury
|b UC Libraries
|c EPS Library
|d EPS Library, Level 3
|t 0
|e TK 7874 .W178
|h Library of Congress classification
|i Book
|m AU00315737B
|
